Exp From 7.0 Yrs To 11.0 Yrs        India - Bangalore

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Job ID - 0660990005

Job Details - Design Verification group of Chelsio communications, market and technology leader enabling the convergence of networking, storage and clustering traffic over high speed Ethernet, is looking for highly skilled verification engineers to verify the ASIC. -              They will be responsible to develop test environment and tests to verify various Networking protocols on sub-system and system level environments. -              Develop detailed test plans and execute the testplan, -              Develop block and system-level test benches and verification environments; achieve complete coverage to ensure first working silicon. -              Adding functional coverage for the environment. -              Develop the required scripts and maintain throughout the project.   Requirement: -              Strong programming experience using system Verilog with UVM/VMM/OVM methodology. -  Must have worked on high speed (1G-400G) MAC/PCS/PMA verification               
Must have hands on experience building complex verification environment
Must have worked with some of the industry standard VIPs
-             Networking protocol knowledge, PCIE/DDR/MAC experience is a plus.            
Experience on PLI/VPI is a plus.

Industry: IT-Software/Software Services
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Contact Person: Ashwini
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